Conventionally, there have been difficulties associated with arrangements of embedded circuits. In particular, these difficulties are typically associated with arrangements of embedded circuits, whose methods of testing on a semiconductor wafer include the following:    1. Connecting the embedded circuit for testing with existing inputs and outputs by multiplexers, which requires the number of inputs and outputs of the embedded circuit to be equal to or less than the number of the inputs and outputs of the overall circuit.    2. Connecting all of the inputs and outputs of the embedded circuit with a serial shift register having parallel inputs and outputs, wherein during normal operation the parallel inputs and outputs of the shift register are operated in a transparent mode, and therefore signals of an external circuit arrive unmodified at the inputs of the embedded circuit and output signals of the embedded circuit arrive unmodified at the inputs of the external circuit. In the test mode, however, test patterns are serially entered into the shift register and are also applied to the inputs of the embedded circuit by various methods; the output signals of the embedded circuit are transferred in parallel into the shift register and are serially transferred to the outside.
An advantage of conventional systems and methods is that the embedded circuit may be fully tested in parallel, thereby allowing the usage of the same test program irrespective of the embedded circuit's application. Another advantage is the possibility to allow to perform the test on the semiconductor wafer (wafer test) and in the individual device (final test). Yet another advantage of this arrangement is that the embedded circuit or a plurality of embedded circuits may be tested by using only few additional inputs and outputs of the overall circuit.
Despite these advantages, there exist several drawbacks as well. For example, a disadvantage of conventional systems and methods is the increased effort for the wiring, in particular when a plurality of embedded circuits to be tested is provided, thereby generally leading to an increase of the required semiconductor area and allowing application of this method only if the overall circuit has at least as many inputs and outputs as the embedded circuit.
Another disadvantage is the increase of the required semiconductor area owing to the additional shift registers and an appropriate circuit for controlling the shift registers. Due to the usage of the shift registers in the data path an increase of the signal propagation time is caused.